Heat spreading layer with high thermal conductivity

ABSTRACT

Embodiments of the invention comprise a homogeneous heat spreading cap element in chip packages to facilitate better heat spreading and dissipation. The heat spreading cap comprises a single high-K graphite layer supported by a copper frame for increased stability and reduced thermal warpage during handling and operation while minimizing thermal penalty by reducing the amount of material having a relatively low heat conductivity that is needed in conventional heat spreading caps.

FIELD OF THE INVENTION

This invention relates generally to the field of controlling thermalconduction in computer chip packaging, and more specifically to a heatspreading cap structure having high thermal conductivity.

BACKGROUND

Innovations in semiconductor fabrication and packaging technologies haveenabled development of high performance, densely integratedsemiconductor chip modules. The downscaling of chip geometries and theincrease in operating speeds lead to increased power densities,resulting in more heat generation per unit area. The increased powerdensity poses practical limitations to the level of integration densityand performance that may be achieved. The ability to implement chipmodules with higher densities and higher performance is limitedprimarily by the ability to effectively cool the chip modules duringnormal operation. For instance, as heat is generated by integratedcircuit (“IC”) chips during normal operation, cooling structures must beemployed to provide sufficiently low thermal resistance paths betweenthe chips and ambient air or a circulating liquid coolant to adequatelyremove heat and maintain the operating temperature of the chips lowenough to assure continued reliable operation.

In conventional packaging technologies, chip level packages can beconstructed with one or more chips mounted on a thin flexible firstlevel package substrate, such as an organic laminate build up packagesubstrate, using micro solder bump connections, referred to as C4's(controlled collapse chip connection). The packages are often bonded toa cap, which provides structural stability to the package by reducingwarpage, and by spreading heat along a plane, thereby improving thepackage thermal performance. The cap, in turn, is attached to asecondary cooling structure, such as a heat sink or a liquid coolingsystem.

Referring now to FIG. 1, a flip chip ball grid array (BGA) package 100,according to the prior art, comprises a chip die 112 having anoperational surface mounted onto a substrate 106 via a series of C4's108 encased in an underfill layer 110. These components are operativelyconnected to a circuit board 102 via a separate series of solder balls104. The die 112 is said to be flipped because its operationalconnections face down towards the substrate 106 and the circuit board102, and its other side is connected to a heat sink 140 via a protectiveheat spreading cap 114. Several layers of the package 100 are connectedusing layers of material, including, for example, the thermal interfacematerial (TIM1) 132 connecting the die 112 to the cap 114, the adhesivelayer 130 connecting the cap 114 to the substrate 106, and the thermalinterface material (TIM2) 134 connecting the cap 114 the heat sink 140.

In conventional implementations, the heat spreading cap 114 may be madefrom copper, having a thermal conductivity of 400 W/m-° C., at 300° K.Although copper has relatively high structural stability and extendsthat stability to the package 100, it is not the most thermallyconductive material available. Some forms of graphite, for example, havemuch higher thermal conductivity across at least one spatial plane.Other forms of graphite exhibit thermal conductivity above 1200 W/m-° C.These materials generally are referred to as high-k materials, or high-kgraphite.

According to an aspect of the prior art (for example, as disclosed byU.S. Pat. No. 6,758,263 B2 entitled “HEAT DISSIPATING COMPONENT USINGHIGH CONDUCTIVE INSERTS”), a heterogeneous planar graphite elementincludes a high-conductivity graphite layer having a cavity for housingan insert. The graphite layer exhibits high thermal conductivity in thex and y planes, but low thermal conductivity in the z plane. The insertlayer has relatively higher thermal conductivity across the z plane, butnot across the x or y planes.

Traditional designs and methods in the prior art face significantchallenges, particularly because known structures using high-k materialexhibit weak structural stability, and experience warpage under normaloperating temperatures. This warpage leads to device defects and even todevice failure. In fact, the relative instability of these structuresalso makes more prone to damage during manufacturing processes.Furthermore, prior art solutions using graphite employ one or moreheterogeneous layers, adding to device complexity but taking advantageof graphite's thermal conductivity in a limited way.

Therefore, it is desirable to manage heat spreading and dissipation insemiconductor packaging technology by taking advantage of the relativelyhigh thermal conductivity of available material, such as graphite, whileat the same time maintaining structural integrity of the package and itsconstituent components.

SUMMARY

Embodiments of the invention include a cooling system for asemiconductor package comprising a heat spreading layer partiallyencased in a supporting frame along an outer perimeter, the supportingframe encasing the perimeter and an adjacent portion of the heatspreading layer to define centrally exposed top and bottom portions ofthe heat spreading layer; and a heat generating element thermallyconnected to the centrally exposed bottom portion of the heat spreadinglayer.

BRIEF DESCRIPTION OF THE DRAWINGS

Elements of the figures are not necessarily to scale and are notintended to portray specific parameters of the invention. For clarityand ease of illustration, scale of elements may be exaggerated. Thedetailed description should be consulted for accurate dimensions. Thedrawings are intended to depict only typical embodiments of theinvention, and therefore should not be considered as limiting the scopeof the invention. In the drawings, like numbering represents likeelements.

FIG. 1 is a cross sectional front elevational view of a flip chip ballgrid array package assembly, according to the prior art;

FIG. 2 is a partial cross sectional front elevational view of a flipchip package assembly, having a heat spreading layer encased in asupporting frame, wherein the supporting frame extends over a portion ofthe heat spreading layer, according to an embodiment of the disclosedinvention;

FIG. 3 is a cross sectional front elevational view of the flip chippackage assembly depicted in FIG. 2, and further depicts a heat sink,according to an embodiment of the disclosed invention;

FIG. 4 is a cross sectional front elevational view of the flip chippackage assembly depicted in FIG. 2, wherein the supporting framecomprises a plurality of interconnected pieces, according to anembodiment of the disclosed invention;

FIG. 5 is a cross sectional front elevational view of the flip chippackage assembly depicted in FIG. 2, wherein the supporting framecomprises a plurality of interconnected pieces, according to anembodiment of the disclosed invention;

FIG. 6 is a partial cross sectional front elevational view of a flipchip package assembly, having a heat spreading layer encased in asupporting frame, wherein the supporting frame extends over a portion ofthe heat spreading layer, according to an embodiment of the disclosedinvention;

FIG. 7 is a partial cross sectional front elevational view of a flipchip package assembly, having a heat spreading layer encased in asupporting frame, wherein the edges of a top surface of the heatspreading layer are chamfered, and a top surface of the supporting frameis flush with a top surface of the heat spreading layer, according to anembodiment of the disclosed invention;

FIG. 8 is a partial cross sectional front elevational view of a flipchip package assembly, having a heat spreading layer encased in asupporting frame, wherein the edges of a top and a bottom surface of theheat spreading layer are chamfered, and a top surface of the supportingframe is flush with a top surface of the heat spreading layer, accordingto an embodiment of the disclosed invention;

FIG. 9 is a partial cross sectional front elevational view of a flipchip package assembly, having a heat spreading layer encased in asupporting frame, wherein the edges of a top and bottom surface of theheat spreading layer are chamfered, and a top surface of the supportingframe is flush with a top surface of the heat spreading layer, accordingto an embodiment of the disclosed invention;

FIG. 10 is a partial cross sectional front elevational view of a flipchip package assembly, having a heat spreading layer encased in asupporting frame, wherein the edges of a top surface of the heatspreading layer are modified to form a rabbet, and a central portion ofa top surface of the supporting frame is flush with the top surface ofthe heat spreading layer, according to an embodiment of the disclosedinvention;

FIG. 11 is a partial cross sectional front elevational view of a wirebonding chip assembly package, having a heat spreading layer encased ina supporting frame, wherein the supporting frame extends over a portionof the heat spreading layer, and central portion of a bottom surface ofthe heat spreading layer is connected to a central portion of a chip,according to an embodiment of the disclosed invention;

FIG. 12 is an aerial view of a multi-core processor having a series ofheat spreading layers encased in a supporting frame, according to anembodiment of the disclosed invention; and

FIG. 13 is a partial cross sectional front elevational view of themulti-core processor depicted in FIG. 12.

DETAILED DESCRIPTION

Referring now to FIG. 2, a subset 200 of a flip chip package, accordingto an embodiment of the disclosed invention, comprises a chip die 112mounted onto a substrate 106 via a series of C4's 108 encased in anunderfill layer 110. A top surface of the chip die 112 is connected to alid comprising a homogeneous, thermally conductive heat spreading layer114 a housed within a supporting frame 114 b. A bottom surface of theheat spreading layer 114 a is connected to the top surface of the chipdie 112 via a thermal interface material (“TIM1”) 132. A bottom surfaceof the supporting frame 114 b is connected to the top surface of thesubstrate 106 via an adhesive layer 130. The heat spreading layer 114 aand the interior cavity of the supporting frame 114 b are also connectedvia an adhesive layer 136. The purpose the adhesive layer 136 is, inpart, to form a strong interaction between the heat spreading layer 114a and the supporting frame 114 b, and to maintain the integrity of thesetwo components, particularly in light of structural stresses, such asheat fluctuations, exerted upon the chip package during manufacturingand operation. One example of the material that can be used to form thelayer 136 is epoxy based adhesive.

Further referring to FIG. 2, the supporting frame 114 b is formed as asingle piece, as is the heat spreading layer 114 a. It is not necessaryto bond these two components via the adhesive layer 136, particularly ifthe supporting frame 114 b is molded onto and around the heat spreadinglayer 114 a during the fabrication process. According to an aspect ofthe disclosed invention, the heat spreading layer 114 a is made from amaterial having relatively high thermal conductivity, such as graphite,some forms of which exhibit conductivity above 1200 W/m-° C.

The graphite heat spreading layer 114 a is effective in spreading heatgenerated by the chip die 112 and its surrounding components across thez plane, and at least one of the x or y planes. By using a high-kmaterial such as graphite, the heat spreading layer 114 a providesgreater heat spreading and dissipation compared to the prior art where acustomary choice of chip cap/lid material is copper. In fact, thegraphite heat spreading layer 114 a has double the thermal conductivityof copper given an equal shape and thickness. Consequently, it is asuitable choice for forming the heat spreading layer 114 a.

According to an aspect of the disclosed invention, the graphite heatspreading layer 114 a may be formed using two smaller graphite piecesjoined at two adjacent edges by an adhesive (not shown) to form a singleplanar graphite layer. Each pyrolytic graphite piece may be grown to athickness of about 25 mm, where its high thermal conductivity is in thehorizontal plane and its low thermal conductivity is in the vertical, orgrowth, direction. Thereafter, each piece is orientated such that thelow thermal conductivity of the graphite is in the x direction. A 50×50mm graphite heat spreader may be constructed by cutting out two piecesthat are 25 mm tall, 4 mm thick, and 50 mm long where the thermalconductivity is high in the 4 mm and 50 mm directions. These pieces areglued together side-by-side (i.e. by joining their respective 4×50 mmfaces) to produce the 50×50×4 mm single, planar layer heat spreader.Other embodiments of the invention may have additional pieces in thesingle planar layer and oriented and joined in a manner different fromthe described configuration, without departing from the scope or thespirit of the invention.

Although graphite has desirable high thermal conductivity, it isgenerally susceptible to thermal warpage and cracking or breaking duringdevice operation. Failure of the heat spreading layer 114 a due towarpage in typical operational conditions may be virtually eliminated byencasing it in the supporting frame 114 b. According to an embodiment ofthe invention, the supporting frame 114 b is made from copper, andencompasses the side, and parts of the top and bottom surfaces of thelayer 114 a, leaving a central portion of both the top and bottomsurfaces of the graphite exposed. By retaining an exposed portion ofgraphite, the heat spreading layer 114 a remains twice as effective asconventional copper caps in thermal conductivity at the exposed area.The supporting frame 114 b gives the heat spreading layer 114 asufficient rigidity at its outer surfaces and edges without creating athermal penalty at its exposed regions.

Other embodiments may employ other metals, such as stainless steel, orpolymers that are sufficiently strong to provide structural stability tothe highly conductive layer 114 a.

Referring now to FIG. 3, a subset 300 of a flip chip package is similarto the elements recited above in connection with FIG. 2, wherein likeelements have been similarly marked. Additionally, the subset 300comprises a heat sink 140 having a bottom surface contoured to fit intothe opening of the exposed area of the top surface of the heat spreadinglayer 114 a and the top surface of the frame 114 b, via a TIM2 layer134. Contouring the bottom surface of the heat sink 140 to the topsurface of the lid is beneficial because it fills a gap that wouldotherwise form between the heat sink 140 and the top surface of the heatspreading layer 114 a due to the asymmetrical shapes of the twosurfaces. Without contouring the bottom surface of the heat sink 140,the gap may be filled with a TIM2 layer, a solution that likely wouldcreate an increased thermal penalty.

Referring now to FIG. 4, a further embodiment of the disclosed inventioncomprises a subset 400 of a flip chip package, as described and depictedin FIG. 2. Additionally, rather than using a single-piece supportingframe (the supporting frame 114 b as shown in FIG. 2), the supportingframe of the subset 400 comprises a top frame 114 c and a foot frame 114d, joined at a junction point 114 e. The two layers may be joined usingan adhesive layer (not shown), or mechanically. Embodiments of thedisclosed invention may comprise top frames 114 c and foot frames 114 dmade from, for example, copper or stainless steel.

Further referring to FIG. 4, the design of the two-piece supportingframe (114 c and 114 d) may be used where manufacturing considerationsmake it less desirable to form a single piece frame. For example, it maynot be feasible to implement a molding mechanism that would form asingle-piece frame around the layer 114 a due to equipment cost, or theunavailability of a polymer ideal for manufacturing a molded frame.

Referring now to FIG. 5, a subset 500 of a flip chip package, accordingto an embodiment of the disclosed invention, comprises the elementsrecited and described with respect to FIG. 4, except that the junctionpoint 114 e between the top frame 114 c and the foot frame 114 d isvertically aligned with the outer edges of the heat spreading layer 114a, and the foot frame 114 d forms an “L” shape in a cross sectionalview.

Further referring to FIGS. 4 and 5, the position of the junction point114 e may be changed according to cost, ease of design, and othermanufacturing considerations, without departing from the spirit andscope of the disclosed invention.

Referring now to FIG. 6, a further embodiment of the disclosed inventioncomprises a subset 600 of a flip chip package, as described inconnection with FIG. 2. In the disclosed embodiment, the supportingframe 114 b is a single piece having a top portion that is substantiallythinner than the side or foot portions of the structure. Moreover, thetop portion of the supporting frame 114 b extends onto the top surfaceof the heat spreading layer 114 a at a fraction of the distance itcovers on the bottom surface of the heat spreading layer 114 a.Consequently, the disclosed embodiment allows for greater spreading anddissipation of heat generated by the chip die 112 by allowing a largersurface area of the heat spreading layer 114 a to connect to a heatsink.

Referring now to FIG. 7, a further embodiment of the disclosed inventioncomprises a subset 700 of a flip chip package, as recited and describedwith respect to FIG. 2. In the depicted embodiment, the top surface ofthe heat spreading layer 114 a is chamfered such that the frame 114 bextends over a portion of the layer 114 a. The top surface of thesupporting frame 114 b is flush with a central portion of the topsurface of the heat spreading layer 114 a, and extends over itschamfered edges. The bottom surface of the heat spreading layer 114 a issubstantially flat. Chamfering the heat spreading layer 114 a increasesthe surface area at which the supporting frame 114 b contacts the heatspreading layer 114 a, improving the supporting frame's 114 b grip,without necessarily reducing the surface area of the heat layer 114 athat remains exposed. Since the exposed portion of the heat spreadinglayer 114 a contacts the heat sink 140, it is desirable to maintain asmuch contact area as possible. Moreover, according to the disclosedembodiment, the heat sink 140 has a flat bottom surface, since the layer114 a is flush with the supporting frame 114 b.

Referring now to FIG. 8, a further embodiment of the disclosed inventioncomprises a subset 800 of a flip chip package, as recited and describedwith respect to FIG. 2. In the depicted embodiment, the heat spreadinglayer 114 a is chamfered along its top surface, and housed within thesupporting frame 114 b, as depicted in FIG. 7, and described inconnection therewith. Additionally, the bottom surface of the heatspreading layer 114 a is also chamfered along its outer edges, with thesupporting frame 114 b extending over the chamfered edges. In thedepicted embodiment, the chamfered surface on the top surface of theheat spreading layer 114 a is larger than the chamfered surface of thebottom surface.

Referring now to FIG. 9, a further embodiment of the disclosed inventioncomprises a subset 900 of a flip chip package, as recited and describedwith respect to FIG. 2. Furthermore, in the depicted embodiment, the topand bottom surfaces of the heat spreading layer 114 a are symmetricallychamfered and encased by the supporting frame 114 b. The top surface ofthe supporting frame 114 b is flush with a central portion of the topsurface of the heat spreading layer 114 a.

Referring now to FIG. 10, a further embodiment of the disclosedinvention comprises a subset 1000 of a flip chip package, as recited anddescribed with respect to FIG. 2. Furthermore, in the depictedembodiment, the top surface of the heat spreading layer 114 a isprocessed to form rabbet edges, and encased in the supporting frame 114b, such that the supporting frame 114 b extends over the rabbet edges.Moreover, the top surface of the supporting frame 114 b is flush with acentral portion of the top surface of the heat spreading layer 114 a.

Referring now to FIG. 11, a further embodiment of the disclosedinvention comprises a subset 1100 of a wire bonding chip assemblypackage similar to the flip chip assembly package depicted in FIG. 6,wherein like elements are similarly referenced. However, according tothe depicted embodiment, the heat spreading layer 114 a furthercomprises a protruding central portion on its lower surface, whereby theheat spreading layer 114 a connects to a central portion of a topsurface of the chip 112. The chip 112 is operatively connected to thesubstrate layer 106 via a plurality of wire connections 142, with theactive side of the chip 112 facing the heat spreading layer 114 a.According to the depicted embodiment, the heat spreading layer 114 a isin contact with a central region of the top surface of the chip 112 soas to provide space for the wire connections 142 in a typical wirebonding package. The wire connections 142 may be encapsulated in amolding compound.

Although the embodiments depicted in FIGS. 2-11 reference an adhesivelayer 136 connecting the heat spreading layer 114 a to the supportingframe 114 b (or to the top frame 114 c and the foot frame 114 d inembodiments having a two-piece frame), forming the adhesive layer 136 isnot necessary to practice the invention. Whether the adhesive layer 136is used and at what thickness may be varied without departing from thespirit or the scope of the disclosed invention.

Furthermore, although the embodiments of the disclosed inventiondepicted in FIGS. 2-10 are based primarily on a flip chip package, itwill be understood by a person of ordinary skill in the art, in light ofthe present disclosure, that the features of the depicted embodiments(including, without limitation, the shape of the heat spreading layer114 a or the supporting frame 114 b) can be incorporated intocorresponding embodiments using a wire bonding assembly package, asdescribed with respect to FIG. 11, without departing from the spirit orscope of the disclosed invention.

In addition, although the embodiments of the disclosed inventiondepicted in FIGS. 2-11 are discussed in reference to the package 100using BGA interconnections between the substrate 106 and the circuitboard 102, as depicted in FIG. 1, these embodiments can be incorporatedinto a land grid array (LGA) package or a pin grid array (PGA) package.In contrast to a BGA package, wherein the substrate 106 is electricallyconnected to the circuit board 102 via a grid of solder ball connections104, LGA packages use surface contact areas on the underside of thesubstrate 106 to connect to a corresponding grid of contacts on thecircuit board 102. The connection may be implemented using a variety ofmethods such as LGA sockets, or solder paste. The substrate 106 surfacecontacts in LGA packages are relatively flat compared to the solder ballconnections in BGA packages. In PGA packages, the surface contacts onthe underside of the substrate 106 are not flat, but instead are pinshaped protrusions arranged in an array, and may connect to a socketmounted on the circuit board 102.

Furthermore, although most of the disclosed embodiments depict asingle-piece frame, it will be understood by a person of ordinary skillin the art that the multi-pieced frames, such as those depicted in FIGS.4 and 5, may be employed in the other depicted embodiments, and anyother embodiments as claimed, without departing from the spirit or scopeof the disclosed invention.

Referring now to FIG. 12, a multichip module (“MCM”) 1200 comprises fourchips 112 (not shown) mounted onto a substrate layer 1200 (via, forexample, a flip chip package) and thermally connected to respective heatspreading layers 114 a, wherein the heat spreading layers 114 a areencased in a supporting frame 114 b. As described with respect to otherembodiments of the invention (and FIGS. 4 and 5 in particular), above,the supporting frame may be formed as a single piece through, forexample, a molding manufacturing process using a polymer; or it may beformed as multiple pieces using additional manufacturing methods, suchas a high pressure metal press. According to one embodiment, thesupporting frame 114 b may comprise a top frame and a foot frame (notshown), similar to similarly referenced components depicted in FIGS. 4and 5.

Referring now to FIG. 13, the multichip module (“MCM”) 1200 comprisesadditional sets of components beneath top surfaces of the supportingframe 114 b and heat spreading layers 114 a depicted in FIG. 12.According to the depicted embodiment, each set of components in the MCM1200 is similar to the embodiment shown in FIG. 6, wherein like elementshave been similarly referenced. According to the embodiment depicted inFIG. 13, each shared portion of the supporting frame 114 b situatedbetween each pair of chips 112 (making a total of four shared portions)is a continuous portion of the entire supporting frame 114 b structure.According to related embodiments, each heat spreading layer 114 a may beencased by a corresponding supporting frame 114 b, wherein thesupporting frames 114 b are thermally or mechanically joined to oneanother to form the MCM 1200.

The disclosed invention, including the depicted embodiments, employ asingle high-k layer supported by a frame having a stronger structuralstability. By using a single graphite layer, for example, the disclosedinvention allows for high heat dissipation across at least two planes,including the z plane, and at least the x or y planes. Consequently, thedisclosed invention allows for effective thermal conduction overallacross the entirety of the heat spreading layer, without sacrificingstructural integrity or incurring a thermal penalty by covering thehigh-k material with another material having relatively low thermalconductivity. Embodiments of the disclosed invention increase thethermal conductivity of semiconductor packages in which they areemployed, and allow for reliable operation in hygrothermal operatingconditions, which include temperatures between −40° C. and 125° C., andas much as 85% relative humidity.

We claim:
 1. A cooling system for a semiconductor package comprising: aheat spreading layer partially encased in a supporting frame, the heatspreading layer including a perimeter, the supporting frame beingconfigured to encase the perimeter and an adjacent portion of the heatspreading layer, defining centrally exposed top and bottom portions ofthe heat spreading layer; and a heat generating element thermallyconnected to the centrally exposed bottom portion of the heat spreadinglayer.
 2. The system of claim 1, wherein the semiconductor package is aflip chip ball grid array package, a flip chip land grid array package,or a flip chip pin grid array package.
 3. The system of claim 1, whereinthe semiconductor package is a wire bonding assembly package.
 4. Thesystem of claim 3, wherein the centrally exposed bottom portion of theheat spreading layer further comprises a centrally protruding portionconnected to a central portion of a top surface of the heat generatingelement.
 5. The system of claim 1, wherein the heat spreading layer ismade from graphite.
 6. The system of claim 5 wherein the heat spreadinglayer is positioned to have high thermal conductivity in a firstdirection being substantially perpendicular relative to the substrate,and relatively high thermal conductivity in at least a second directionsubstantially parallel relative to the substrate.
 7. The system of claim1, wherein the heat spreading layer is made from pyrolytic graphite. 8.The system of claim 1, wherein the heat spreading layer is attached tothe supporting frame using an adhesive material.
 9. The system of claim1, wherein the supporting frame is a single piece having a cavity forencasing the heat spreading layer.
 10. The system of claim 1, whereinthe supporting frame comprises at least a first piece and a secondpiece.
 11. The system of claim 10, wherein the first piece and thesecond piece of the supporting frame are joined mechanically, by anadhesive material, and/or by a thermally conductive adhesive material.12. The system of claim 1, wherein the supporting frame is made from apolymer.
 13. The system of claim 1, wherein the supporting frame is madefrom a metal.
 14. The system of claim 13, wherein the supporting frameis made from copper.
 15. The system of claim 1, wherein a top surface ofthe supporting frame is flush relative to a top surface of the heatspreading layer.
 16. The system of claim 1, wherein at least a portionof a top surface of the supporting frame is raised relative to a topsurface of the heat spreading layer.
 17. The system of claim 1, whereinan inner perimeter of a top portion of the supporting frame surroundsthe centrally exposed top portion of the heat spreading layer, and theinner perimeter is beveled.
 18. The system of claim 1, wherein a portionof the top surface of the supporting frame extends over a portion of thetop surface of the heat spreading layer.
 19. The system of claim 1,further comprising a heat dissipating element thermally connected to atop surface of the heat spreading layer, the heat dissipating elementhaving a centrally protruding portion on a bottom surface thereof,wherein the centrally protruding portion is beveled.
 20. The system ofclaim 1, wherein a top surface and/or a bottom surface of the heatspreading layer is chamfered.
 21. The system of claim 1, wherein a topsurface and/or a bottom surface of the heat spreading layer has rabbetedges.
 22. A semiconductor package, comprising: a substrate; a chipelectrically connected to the substrate; a thermal module having a heatspreading layer partially encased in a supporting frame, the heatspreading layer including a perimeter, the supporting frame beingconfigured to encase the perimeter and an adjacent portion of the heatspreading layer, defining centrally exposed top and bottom portions ofthe heat spreading layer, wherein the chip is thermally connected to thecentrally exposed bottom portion of the heat spreading layer; and acircuit board electrically connected to the substrate and the chip. 23.The semiconductor package of claim 22, further comprising: a pluralityof the chips electrically connected to the substrate; and a plurality ofthe thermal modules corresponding to each of the chips, wherein eachchip is thermally connected to the centrally exposed bottom portion ofeach of a plurality of the heat spreading layers, respectively, of eachof the thermal modules.
 24. A method for cooling a heat generatingelement in a semiconductor package, comprising: partially encasing aheat spreading layer in a supporting frame, the heat spreading layerincluding a perimeter, the supporting frame being configured to encasethe perimeter and an adjacent portion of the heat spreading layer,defining centrally exposed top and bottom portions of the heat spreadinglayer; and thermally connecting a heat generating element to thecentrally exposed bottom surface of the heat spreading layer.
 25. Themethod of claim 23, wherein the semiconductor package operates under ahygrothermal condition with a temperature between approximately −40° C.and 125° C. and relative humidity of up to 85%.